GSR065D046 650V, 15 m Ω GaN FET is a normally closed device using GSR semiconductor Gen V platform. It provides superior reliability and performance by combining the most advanced high-voltage GaNHEMT with low-voltage silicon MOSFETs. The Gen V platform uses advanced epitaxial and patented design technologies to simplify manufacturability, while improving device efficiency by reducing gate charge, output capacitance, cross loss and reverse recovery charge.

GaN chip GaN third generation semiconductor Jinshajiang Semiconductor
Detail DataSheet

Product introduction

GSR065D095(650V SuperGaN ™ FET  in  TO-247)

GSR065D046650V, 35m Ω GaN FET; GSRSemicatorsGenIV; Normally off device of the platform. It combines the most advanced high-voltage GaNHEMT  With low-voltage silicon MOSFET to provide excellent reliability and performance.

GenIV  The platform uses advanced epitaxy and patented design technology to simplify manufacturability, while improving the device performance by reducing gate charge, output capacitance, cross loss and reverse recovery charge


Product features

• GaN technology certified by JEDEC& nbsp;•& nbsp;& nbsp; Production test of dynamic on resistance

• Robust design, defined as

           Wide gate safety margin

          Transient overvoltage capacity

• Enhanced surge current capability

•Very low QRR

• Cross loss reduction

Product benefits

•Enable totem column bridgeless PFC design

         Increase power density

         Reduce system size and weight

         Lower overall system cost

Key Specifications  
VDSS (V) 650 
V(TR)DSS (V) 725 
RDS(on)eff  (mΩ) max* 18 
QRR (nC) typ 430 
QG (nC) typ 68 


Absolute Maximum Ratings (Tc=25°C unless otherwise stated.) 

Symbol Parameter Limit Value Unit 
VDSS Drain to source voltage (TJ = -55°C to 150°C) 650 V  
V(TR)DSS Transient drain to source voltage a 725 
VGSS Gate to source voltage   ±20 
PD Maximum power dissipation @TC=25°C 276 
ID   Continuous drain current @TC=25°C b95 
 Continuous drain current @TC=100°C b60 
IDM Pulsed drain current (pulse width: 10µs) 600 
TC Operating temperature Case  -55 to +150 °C 
TJ Junction  -55 to +150 °C 
TS Storage temperature -55 to +150 °C 
TSOLD Soldering peak temperature c 260 °C 


  1. In off-state, spike duty cycle D<0.01, spike duration <1µs 
  2. For increased stability at high current operation, see Circuit Implementation on page 3 
  3. For 10 sec., 1.6mm from the case 

Thermal Resistance 

Symbol  Parameter Max Unit 
RΘJC Junction-to-case  0.45 °C/W 
RΘJA Junction-to-ambient  40 °C/W 


Circuit implementation

Recommended gate drive: (0V, 12V) with RG=15Ω 

Gate Ferrite Bead (FB1) Required DC Link RC Snubber (RCDCL) a 

Recommended Switching Node 

RC Snubber (RCSN) b,c

80-120 Ω at 100MHz [10nF + 3.3 Ω] x 3 Not necessary 


  1. RCDCL should be placed as close as possible to the drain pin
  2. RCSN is needed only if RG  is smaller than recommendations or operational current exceeds 100C rated IDMAX 
  3. If required, please use (100 pF + 10 ohm) or parallel two or three of the same 

Electrical Parameters (TJ=25°C unless otherwise stated)

Symbol Parameter Min Typ Max Unit Test Conditions 
Forward Device Characteristics    
V(BL)DSS Drain-source voltage 650 — — VGS=0V 
VGS(th) Gate threshold voltage 3.3 4.8 VDS=VGS, ID=2mA  
RDS(on)eff  Drain-source on-resistance a  — 15 18 mΩ VGS=10V, ID=60A  
  — 31 —  VGS=10V, ID=60A, TJ=150°C 
IDSS  Drain-to-source leakage current — 70 µA VDS=650V, VGS=0V  
  — 50 —  VDS=650V, VGS=0V, TJ=150°C 
IGSS  Gate-to-source forward leakage current — — 400 nA VGS=20V 
 Gate-to-source reverse leakage current — — -400  VGS=-20V 
CISS Input capacitance — 4670 — pF VGS=0V, VDS=400V, f=1MHz       
COSS Output capacitance — 312 — 
CRSS Reverse transfer capacitance — — 
CO(er) Output capacitance, energy related b — 497 — pF VGS=0V, VDS=0V to 400V 
CO(tr)  Output capacitance, time related c — 1020 —   
QG Total gate charge — 68 100 nC   V DS=400V, VGS=0V to 10V, ID=60A   
QGS Gate-source charge — 30 — 
QGD Gate-drain charge — 18 — 
QOSS Output charge — 430 — nC   VGS=0V, VDS=0V to 400V  
tD(on) Turn-on delay — 78 — ns  

VDS=400V, VGS=0V to 12V, 

RG=15, ZFB=120 at 100MHz, 


tR Rise time — 20 — 
tD(off) Turn-off delay — 132 — 
tF Fall time — 10 — 


  1. Dynamic on-resistance; see Figures 19 and 20 for test circuit and conditions 
  2. Equivalent capacitance to give same stored energy as VDS rises from 0V to 400V 
  3. Equivalent capacitance to give same charging time as VDS rises from 0V to 400V 


Electrical Parameters (TJ=25°C unless otherwise stated)

Symbol Parameter Min Typ Max Unit Test Conditions 
Reverse Devi ce Characteristics      
IS Reverse current — — 60 V GS=0V, TC=100°C ≤15% duty cycle 
VSD  Reverse voltage a — 1.5 — VGS=0V, IS=60A  
  — 1.1 —  VGS=0V, IS=30A  
tRR Reverse recovery time — 100 — ns IS=60A, VDD=400V,  di/dt=1000A/µs 
QRR Reverse recovery charge — 430 — nC 
(di/dt)RM Reverse diode di/dt b — — 3500 A/µs Circuit implementation and parameters on page 3 


  1. Includes dynamic RDS(on) effect 

Reverse conduction di/dt will not exceed this max value with recommended RG. 



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Ganhonor Semiconductor Co., Ltd

Ganhonor Semiconductor Co., Ltd. was established in 2021. The project initiator is a leader in the field of gallium nitride (GaN、GaN HEMT、GaN FET). With the industry-leading gallium nitride power devices and their new applications as the flagship products, it takes the full advantages of the world's leading manufacturing technologies on the 6-8 inch GaN-on-Silicon power electronics platform, and the synergy of supply chain resources, core technology, manufacturing capability, key customers, capital market, local organization support and other key resources. This provides a new IDM platform to help achieve leapfrog development in the industry of the third generation semiconductors.


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