GSR065D034 650V, 50 m Ω GaN FET is a normally closed device. It provides superior reliability and performance by combining the most advanced high-voltage GaNHEMT with low-voltage silicon MOSFETs. Advanced epitaxy and patented design technology are used to simplify manufacturability, and device efficiency is improved by reducing gate charge, output capacitance, cross loss and reverse recovery charge.

Gallium nitride chip Third generation semiconductor Jinshajiang semiconductor semiconductor chip GaN chip
Detail DataSheet

brief introduction

GSR065D34(650VSuperGaN ® FETinTO-263)

GSR065D034650V、50mΩ  Gallium nitride (GaN) FET; It is a normally closed device. It combines the most advanced high-voltage GaNHEMT  With low-voltage silicon MOSFET to provide excellent reliability and performance.

Advanced epitaxy and patented design technology are used to simplify manufacturability, and device efficiency is improved by reducing gate charge, output capacitance, cross loss and reverse recovery charge.


Product characteristics

  • GaN technology certified by JEDEC
  • Production test of dynamic on resistance
  • Robust design, defined as
    • Wide gate safety margin
    • Transient overvoltage capacity
  • Enhanced surge current capability
  • Very low QRR
  • Cross loss reduction


Product benefits

  • Enable totem column bridgeless PFC design
    • Increase power density
    • Reduce system size and weight
    • Lower overall system cost
  • Improve the efficiency of hard switching and soft switching circuits
  • Easy to use Common grid drivers are easy to drive
  • GSD pin layout improves high-speed design



  • data communication
  • Wide range of industrial applications
  • PV inverter
  • Servo motor application
Key Specifications  
VDSS (V) 650 
VDSS(TR)(V)  800 
RDS(on)eff  (mΩ) max* 60 
QRR (nC) typ 120 
QG (nC) typ 16 


Absolute Maximum Rating;(Tc=25 ° C  unless otherwise stated)

Symbol Parameter Limit Value Unit 
VDSS Drain to source voltage (TJ = -55°C to 150°C) 650 V  
VDSS(TR) Transient drain to source voltage a 800 
VGSS Gate to source voltage   ±20 
PD Maximum power dissipation @TC=25°C 119 
ID   Continuous drain current @TC=25°C b34 
 Continuous drain current @TC=100°C b22 
IDM Pulsed drain current (pulse width: 10µs) 150 
TC Operating temperature Case  -55 to +150 °C 
TJ Junction  -55 to +150 °C 
TS Storage temperature -55 to +150 °C 
TSOLD Soldering peak temperature c 260 °C 


  1. In off-state, spike duty cycle D<0.01, spike duration <30µs, non repetitive 
  2. For increased stability at high current operation, see Circuit Implementation on page 3 
  3. Reflow MSL3 


Thermal Resistance 

Symbol  Parameter Maximum Unit 
RΘJC Junction-to-case  1.05 °C/W 
RΘJA Junction-to-ambient  40 °C/W 


Electrical Parameters (TJ=25°C unless otherwise stated)

Symbol Parameter Min Typ Max Unit Test Conditions 
Forward Device Characteristics    
VDSS(BL) Drain-source voltage 650 — — VGS=0V  
VGS(th) Gate threshold voltage 3.3 4.8 VDS=VGS, ID=0.7mA 
ΔVGS(th)/TJ Gate threshold voltage temperature coefficient — -6.2 — mV/°C 
RDS(on)eff  Drain-source on-resistance a   — 50 60 mΩ VGS=10V, ID=22A  
— 105 — VGS=10V, ID=22A, TJ=150°C 
IDSS  Drain-to-source leakage current — 40 µA VDS=650V, VGS=0V  
— 15 — VDS=650V, VGS=0V, TJ=150°C 
IGSS  Gate-to-source forward leakage current — — 100 nA VGS=20V 
— — -100 VGS=-20V  
CISS Input capacitance — 1000 — pF VGS=0V, VDS=400V, f=1MHz 
COSS Output capacitance — 110 — 
CRSS Reverse transfer capacitance — — 
CO(er) Output capacitance, energy related b — 164 — pF VGS=0V, VDS=0V to 400V 
CO(tr)  Output capacitance, time related c — 280 — 
QG Total gate charge — 16 24 nC V DS=400V, VGS=0V to 10V, ID=22A 
QGS Gate-source charge — — 
QGD Gate-drain charge — — 
QOSS Output charge — 120 — nCVGS=0V, VDS=0V to 400V 
tD(on) Turn-on delay — 49.2 — ns

VDS=400V, VGS=0V to 10V, 

ID=22A, Rg=45Ω, ZFB=240Ω at 100MHz (See Figure 14) 

tR Rise time — 11.3 — 
tD(off) Turn-off delay — 88.3 — 
tF Fall time — 10.9 — 


  1. Dynamic on-resistance; see Figures 17 and 18 for test circuit and conditions 
  2. Equivalent capacitance to give same stored energy as VDS rises from 0V to 400V 
  3. Equivalent capacitance to give same charging time as VDS rises from 0V to 400V 

Electrical Parameters (TJ=25°C unless otherwise stated)

Symbol Parameter Min Typ Max Unit Test Conditions 
Reverse Devi ce Characteristics      
IS Reverse current — — 22 V GS=0V, TC=100°C,  ≤25% duty cycle 
VSD  Reverse voltage a — 2.2 2.6 VGS=0V, IS=22A 
  — 1.6 1.9  VGS=0V, IS=11A 
tRR Reverse recovery time — 50 — ns IS=22A, VDD=400V 
QRR Reverse recovery charge — 120 — nC  
(di/dt)RM Reverse diode di/dt b — — 2500 A/µs Circuit implementation and parameters on page 3 



Includes dynamic RDS(on) effect 

Reverse conduction di/dt will not exceed this max value with recommended RG. 

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Ganhonor Semiconductor Co., Ltd

Ganhonor Semiconductor Co., Ltd. was established in 2021. The project initiator is a leader in the field of gallium nitride (GaN、GaN HEMT、GaN FET). With the industry-leading gallium nitride power devices and their new applications as the flagship products, it takes the full advantages of the world's leading manufacturing technologies on the 6-8 inch GaN-on-Silicon power electronics platform, and the synergy of supply chain resources, core technology, manufacturing capability, key customers, capital market, local organization support and other key resources. This provides a new IDM platform to help achieve leapfrog development in the industry of the third generation semiconductors.


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